Mariner 9 computing equipment

I am guessing the word CPU can't be used in reference to computers in 1971. So I am wondering what type of electronic equipment were put in place of a regular CPU on Mariner 9 spacecraft?

I see the following operations needed to be achieved:

I also see that:

Mariner 9's computer was thus reprogrammed from Earth to delay imaging of the surface for a couple of months until the dust settled.

So what type of CPU/RAM was used at that time?

• It's unclear to me what you're asking exactly. Which CPU did Mariner use? How was it reprogrammed? How was error correction implemented? Mar 5 at 19:56
• CPU is not a recent terminology. A CPU is defined as a device for software (computer program) execution, the earliest devices that could rightly be called CPUs came with the advent of the stored-program computer. Computers in the 1950s had CPUs, they were just larger units compared to what we are used to now.
– Fred
Mar 5 at 23:08
• Back in the days when mainframes ruled the Earth, a "unit" in a computer room was a free-standing cabinet containing some part of the computer. There would be memory units, tape units, printing units, etc., and tieing all of them together, would be the central processing unit (CPU). Mar 6 at 20:22

Mariner 9 used magnetic core memory. It had the awesome amount of 512 words (quadrupled from the original design as requirements grew).

The document never actually comes out and says so, but it's clear from this description of a problem they had:

The memory vacuum problem became evident the first time the memory was subjected to vacuum as part of the required TA test. This vacuum sensitivity, which resulted in catastrophic failure of the magnetic-core memory plane, was traced to trapped air underneath the polyurethane-coated memory plane. Under vacuum this trapped air expanded underneath the plane such that the very fine magnet wire that is strung through the magnetic cores was stretched and broken. The solution to the problem was, of course, the elimination of the trapped air. This was accomplished by more careful application of a two-sided adhesive tape used to hold the magnetic-core plane to the mounting board, and better application of the polyurethane coating material.

(emphasis mine)

Development and Testing of the Central Computer and Sequencer for the Mariner Mars 1971 Spacecraft

Information on the computer can be found in the design document referenced in the one linked above.

The design selected was a programmable sequencer, with a 128-word core memory.This programmable sequencer, with a memory which could be updated or modified by ground command...

The other subsystem capable of commanding spacecraft events is the CC&S. Figure 9 shows the CC&S with its functional interfaces. Basically, the CC&S is a special purpose computer which has extreme flexibility and can be reprogrammed in flight. Its primary purpose is to provide event actuation at certain times which are specified prior to launch.

(emphasis mine)

CC&S = central computer and sequencer

This document also reveals that the word length was 22 bits.

Mariner Mars 1969. Volume 1 - Development, design, and test Final project report

• From reading the article it appears that the 512 words of memory were for data only. Flight computers back then were oftentimes Harvard architecture machines rather than von Neumann architecture machines. Mar 5 at 19:15
• @Joshua There is no way that the instructions for all the things Mariner 9 did were stored in a mere 512 words. Data and instructions are stored in one monolithic memory in a von Neumann architecture machine. A Harvard architecture machine on the other hand uses one memory for volatile data and another fixed (nonvolatile) memory for things such as instructions. These different memory types (volatile versus nonvolatile data) may even have different word lengths in a Harvard architecture machine. Mar 6 at 17:18
• @Joshua A Harvard architecture machine can still serve as a Turing complete machine. The smartphone or computer on which you typed your comment most likely looks like a von Neumann machine, but it inevitable has a tinge of Harvard architecture to it. When you reboot the device it uses code in read-only memory as a boot loader. When executing code, the lowest level memory caches comprise two separate regions, one for read-only instructions and another for read-write volatile data. Mar 6 at 17:48
• @DavidHammen: The idea of the sequencer is it contains "execute this instruction at this system time". But it's remotely reprogrammable. Mar 6 at 21:41
• Your ability to find old technical documents for this & for that is impressive.
– Fred
Mar 7 at 11:41