I seek detailed information on the computer and/or data handling system of Rosetta.

  • Who manufactured it?
  • What type(s) of CPU is used?
    • What kind of architecture does it belong to and at what frequency does it operate?
  • What is the operating system?
  • How much data can the system store?
    • What types of storage does it include (RAM, ROM, disks, whatever)?
  • What are the I/O rate of the various storage devices?
  • Is there any buffering system? (At what rate can the data be send back to Earth?)
  • 5
    $\begingroup$ That's a lot of questions. $\endgroup$
    – gerrit
    Jul 21, 2013 at 18:50
  • $\begingroup$ I would like to know some details about the computer, yes, but I care most about the memory speeds. I could use this as a reference for something I am working on. However, even ignoring the speeds, there is not even good information on the computer in general as far as I can tell ... or I am looking at the wrong places. $\endgroup$
    – s-m-e
    Jul 22, 2013 at 8:19
  • 2
    $\begingroup$ What about this one I just stumbled across? spyr.ch/ps/ads/qm/usermanual.html $\endgroup$
    – user1504
    Jan 25, 2014 at 21:56
  • $\begingroup$ I'd like to add what language are they programming in, without revealing what I hope the answer is (or is not). $\endgroup$
    – Bob Stein
    Aug 19, 2014 at 13:14

1 Answer 1



The Solid State Mass Memory (SSMM) is 25 Gbit (about 3 GByte) with a 5Mbps data rate.

The telemetry rate shall be switchable between 8 bps and 65536 bps


The bus throughput shall be minimal 131 kbps.

The SSMM shall support an input data rate of up to 5 Mbps useable data (physical data rate excluding IEEE-1355 protocol overhead)

The telecommand rate shall be switchable between at least 4 bit rates, i.e. 7.81 (4000/2 ), 250, 1000 and 2000 bps.

The usable memory size shall be at least 1MWord RAM and 512 KWords EEPROM for each of 4 processors, and 512KWords PROM (redundant) accessible from each processor.

The SSMM shall have a size of at least 25 Gbit at end of life taking into account failures in memory cells.

Found Here


The Central Interface Unit (CIU) provides the communication among the units of the Lander. This is a synchronous, serial data transmission channel with the transmission rate of 32kbit/s.


The Harris RTX2010 processor has been selected for the DPU boards

Note that there are two Data Process Units (DPU) in warm-redundant mode. Also note that this is a 16 bit processor.

Found Here

Data: 235 Mbit during primary mission, 65 Mbit during each subsequent 60 h period


Data rate 16 kbit/sec


central computing and data storage capability (2x2 Mbyte, RAM, EEPROM)

Found Here

  • 2
    $\begingroup$ And also one of its cameras (i think osiris) has 4M pixels resolution, was quite big at that time (2004) $\endgroup$
    – Gregory
    Nov 13, 2014 at 3:36
  • 3
    $\begingroup$ To add another reference - some info can be found here $\endgroup$
    – nos
    Nov 13, 2014 at 11:25

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